Hi,

I would like to read data from slave SPI device, which is based on slow microcontroller, with maximum 250 kHz clock. I've managed to configure SPI interface at ~5 MHz clock or so, but spidev driver refuses to configure at low speed. As far as I've dig into driver, it checks for limit F_CPU / 128, which would be 320 MHz / 128 = 2.5 MHz. Is it possible to configure some kind of hardware pre-scaler for that, or maybe I should use some kind of bit banging SPI driver for such application?

j

I have not tried it yet, but if you tell more details (working code / register dump if you are using mmio to test it manual way) it would be clearer.

Actually I'm using spidev_test utility from kernel source. My question would be if it's possible to configure SPI device below 2.5 MHz clock.

I've found similar device datasheet:
http://www.tracermcc.ru/foto/bender/RT3 ... 8_0902.pdf

SPICFG register, SPICLK bits, recifies SPI clock divide control, which minimum value is: rate / 128. So given the fact that system clock is 320 MHz, it isn't possible to achieve less than 2.5 MHz ?

try to use software SPI for slow modes

System clock is 1/3 of the CPU CLK

320Mhz / 3 /128 = 833 kHz is the lowest speed on the hardware SPI

thx jedas for this useful hint